1. Field of the Invention
The present invention relates to a semiconductor integrated circuit and more specifically relates to a current generating circuit suitable for generating a reference current which is particularly constant with respect to ambient temperature and power source voltage.
2. Description of the Prior Art
In a semiconductor integrated circuit it is sometimes required to have a constant current which is independent from external conditions such as variations in power source voltage and ambient temperature. JP-A-62-293327(1987) discloses a measure of obtaining a constant current with respect to ambient temperature in a CMOS LSI. FIG. 9 shows the circuit arrangement thereof, in which with a first current mirror circuit which operates in a weak inversion region of a MOS transistor and with a second current mirror circuit which operates in a strong inversion region of MOS transistor, a current having a positive temperature dependency and a current having a negative temperature dependency are respectively generated and by adding the two types of currents, a circuit which generates a current having a reduced temperature dependency in comparison with the respective individual currents.
Further, in a conventional LSI for an ECL (Emitter Coupled Logic) interface a band gap reference circuit was used for fulfulling the specification of potential levels at the input and output. An example of the conventional reference signal generating circuits is disclosed in Journal of Solid State Circuits, Vol. SC-8, No. 5, 1973 October, pp 362-367. FIG. 10 shows the constant voltage generating circuit for fulfilling the ECL specification disclosed in the above paper, in which bipolar transistors Q1 and Q2 and a resistor element R1 generate a current having a positive temperature dependency and by flowing the generated current through a resistor element R11 a voltage having positive temperature dependency is generated between both ends of the resistor element R11. By adding the generated voltage and a base-emitter voltage of the bipolar transistor Q2, a voltage independent of temperature is obtained. In this instance, for producing a summed voltage of these two voltages it is necessary to connect the bipolar transistors and the resistor elements. When the voltage obtained by the addition can be subsequently applied to a resistor element, a current independent from temperature is obtained. However, since voltages of about 0.5 V or more for a resistor element R10, 0.8 V or more for respective bipolar transistors Q10, Q11 and Q2 and about 0.5 V for the resistor element R11 are at least required for their operation, a power source voltage of at least about 3 V is required for between the VCC node and the VEE node in order for the circuit to correctly operate as intended.
In the drawings of the present application circle marks denote a power source node at a high potential side (referred to as VCC) and triangle marks denote a power source node at a low potential side (as called VEE).
The problems of the above explained conventional art are that a constant current generating circuit, which generates a constant current without being affected by variations such as of ambient temperature and of power source voltage, and which operates at a high accuracy which fulfills the ECL specification while requiring only a low power source voltage of about 3 V, can not be achieved. In particular, in the conventional ECL circuit the resistor element R11 and the bipolar transistor Q2 or the resistor element R12 and the bipolar transistor Q1 and the like are connected in series, therefore the operating speed thereof is regulated by the constant power source voltage. Further, the above circuit proposed for a CMOS LSI has a problem with regard to accuracy which is insufficient for applying to the ECL LSI. Because of the specification with regard to the input and output potential levels in a LSI for the ECL interface, a current source which generates a reference current is necessary in the integrated circuit. In the conventional LSI for the ECL interface the specification was fulfilled by making use of by a reference signal generating circuit called as an ECL 100k power source circuit. An example of such conventional circuits is disclosed in Journal of Solid State Circuits, Vol. SC-22, No. 1 pp 71-76. FIG. 19 shows a 100k ECL output buffer circuit constituted by making use of the conventional 100k ECL power source circuit as disclosed in the above paper. Further, FIG. 20 shows the ECL 100k specification wherein RL represents a resistor provided between the output terminal and an output termination potential (VTT=-2.0 V) and all of the volatges are determined with reference to potential of VCC.
The structure of the conventional 100k ECL output buffer circuit is explained with reference to FIG. 19. The circuit is divided into a reference voltage generating circuit unit and a 100k ECL output buffer circuit unit. Through bipolar transistors Q1 and Q2 and a resistor element R1 in the reference voltage generating circuit unit surrounded by a dotted line in the drawing the collector current of the bipolar transistor varies depending upon temperature. When the current flows through a resistor element R10, a voltage having the same temperature dependency as the collector current is generated between both ends of the resistor element R10. For adding this generated voltage and the base-emitter voltage of the bipolar transistor Q2 the bipolar transistor Q2, and the resistor element R10 are connected in series. The added voltage is generated between VEE (power source terminal at a lower voltage side) and VCS in the drawing when the base-emitter voltages of the bipolar transistors Q22 and Q24 are equivalent. The 100k ECL output buffer circuit receives the generated voltage and generates a voltage output which is compatible with the ECL 100k standard.
In the above conventional art, since it is necessary to connect the bipolar transistor Q2, the resistor element R10 and the like in series as explained in the above, there was a problem that the circuit could not operate normally under a low power source voltage of about 3 V or less.